Detailed Product Description
CPLD
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Programmable Logic Device Family
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Description: MAX 7000A (including MAX 7000AE) devices are high-density, highperformance devices based on Altera’s second-generation MAX architecture.
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Features:
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Built-in boundary-scan test (BST) circuitry compliant with IEEE Std. 1149.1
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Supports JEDEC Jam Standard Test and Programming Language (STAPL) JESD-71
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Enhanced ISP features
– Enhanced ISP algorithm for faster programming (excluding EPM7128A and EPM7256A devices)
– ISP_Done bit to ensure complete programming (excluding EPM7128A and EPM7256A devices)
– Pull-up resistor on I/O pins during in-system programming
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Pin-compatible with the popular 5.0-V MAX 7000S devices
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High-density PLDs ranging from 600 to 10,000 usable gates
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Extended temperature range
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Delivery time: 5-7days from distributor
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Payment: T/T in advance
Keywords: Altera FPGA Programmable Logic Devices